#include "mhscpu.h"
#include "mhscpu_it.h"
#include <string.h>
#include <stdio.h>
#include "ring_buffer.h"

extern RingBufferTypeDef ringBufWrite;
extern RingBufferTypeDef ringBufRead;

extern uint32_t page_addr;
extern uint32_t page_addr_offset;
extern uint32_t read_bytes;

/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/

/******************************************************************************/
/*            Cortex-M3 Processor Exceptions Handlers                         */
/******************************************************************************/

/**
  * @brief  This function handles NMI exception.
  * @param  None
  * @retval None
  */
void NMI_Handler(void)
{
}

/**
  * @brief  This function handles Hard Fault exception.
  * @param  None
  * @retval None
  */
void HardFault_Handler(void)
{
  /* Go to infinite loop when Hard Fault exception occurs */
  while (1)
  {
  }
}

/**
  * @brief  This function handles Memory Manage exception.
  * @param  None
  * @retval None
  */
void MemManage_Handler(void)
{
  /* Go to infinite loop when Memory Manage exception occurs */
  while (1)
  {
  }
}

/**
  * @brief  This function handles Bus Fault exception.
  * @param  None
  * @retval None
  */
void BusFault_Handler(void)
{
  /* Go to infinite loop when Bus Fault exception occurs */
  while (1)
  {
  }
}

/**
  * @brief  This function handles Usage Fault exception.
  * @param  None
  * @retval None
  */
void UsageFault_Handler(void)
{
  /* Go to infinite loop when Usage Fault exception occurs */
  while (1)
  {
  }
}

/**
  * @brief  This function handles SVCall exception.
  * @param  None
  * @retval None
  */
void SVC_Handler(void)
{
}

/**
  * @brief  This function handles Debug Monitor exception.
  * @param  None
  * @retval None
  */
void DebugMon_Handler(void)
{
}

/**
  * @brief  This function handles PendSVC exception.
  * @param  None
  * @retval None
  */
void PendSV_Handler(void)
{
}

/**
  * @brief  This function handles SysTick Handler.
  * @param  None
  * @retval None
  */
void SysTick_Handler(void)
{
	printf("SysTick_Handler\r\n");
}

/******************************************************************************/
/*                 STM32F10x Peripherals Interrupt Handlers                   */
/*  Add here the Interrupt Handler for the used peripheral(s) (PPP), for the  */
/*  available peripheral interrupt handler's name please refer to the startup */
/*  file (startup_stm32f10x_xx.s).                                            */
/******************************************************************************/

/**
  * @brief  This function handles PPP interrupt request.
  * @param  None
  * @retval None
  */

#define SEND_BUF_SIZE				256
#define RECE_BUF_SIZE				256

extern uint8_t send_buf[SEND_BUF_SIZE];
extern uint8_t rece_buf[RECE_BUF_SIZE];

extern uint32_t send_buf_index;
extern uint32_t rece_buf_index;
extern SPI_TypeDef *SPIx;
void SPI0_IRQHandler(void)
{
	if(SPI_GetITStatus(SPIx,SPI_IT_RXF) == SET)
	{
		rece_buf[rece_buf_index++] = SPI_ReceiveData(SPIx);
		rece_buf_index = rece_buf_index % RECE_BUF_SIZE;
		SPI_ClearITPendingBit(SPIx, SPI_IT_RXF);
	}

	if(SPI_GetITStatus(SPIx,SPI_IT_TXE) == SET)
	{
		SPI_SendData(SPIx, send_buf[send_buf_index++]);
		send_buf_index = send_buf_index % SEND_BUF_SIZE;
		if(0 == send_buf_index)
			SPI_ITConfig(SPIx, SPI_IT_TXE, DISABLE);
		SPI_ClearITPendingBit(SPIx, SPI_IT_TXE);
	}
	
	NVIC_ClearPendingIRQ(SPI0_IRQn);
}
void SPI1_IRQHandler(void)
{
  if(SPI_GetITStatus(SPIx,SPI_IT_RXF) == SET)
	{
		rece_buf[rece_buf_index] = SPI_ReceiveData(SPIx);
		rece_buf_index++;
		SPI_ClearITPendingBit(SPIx, SPI_IT_RXF);
	}

	if(SPI_GetITStatus(SPIx,SPI_IT_TXE) == SET)
	{
		SPI_SendData(SPIx, send_buf[send_buf_index]);
		send_buf_index++;
		SPI_ITConfig(SPIx, SPI_IT_TXE, DISABLE);
		SPI_ClearITPendingBit(SPIx, SPI_IT_TXE);
	}

	NVIC_ClearPendingIRQ(SPI1_IRQn);
}

void SPI2_IRQHandler(void)
{
	if(SPI_GetITStatus(SPIx,SPI_IT_RXF) == SET)
	{
		rece_buf[rece_buf_index] = SPI_ReceiveData(SPIx);
		rece_buf_index++;
		SPI_ClearITPendingBit(SPIx, SPI_IT_RXF);
	}

	if(SPI_GetITStatus(SPIx,SPI_IT_TXE) == SET)
	{
		SPI_SendData(SPIx, send_buf[send_buf_index]);
		send_buf_index++;
		SPI_ITConfig(SPIx, SPI_IT_TXE, DISABLE);
		SPI_ClearITPendingBit(SPIx, SPI_IT_TXE);
	}

	NVIC_ClearPendingIRQ(SPI2_IRQn);
}

void DMA0_IRQHandler(void)
{
    if (DMA_GetITStatus(DMA_Channel_1,DMA_IT_BlockTransferComplete) == SET)
    {
        DMA_ClearITPendingBit(DMA_Channel_1,DMA_IT_BlockTransferComplete);
        DMA_ChannelCmd(DMA_Channel_1, ENABLE);
    }
//    if (DMA_GetITStatus(DMA_Channel_0,DMA_IT_BlockTransferComplete) == SET)
//    {
//        DMA_ClearITPendingBit(DMA_Channel_0,DMA_IT_BlockTransferComplete);
//        DMA_ChannelCmd(DMA_Channel_0, ENABLE);
//    }
    NVIC_ClearPendingIRQ(DMA_IRQn);
}




/**/

